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FPGA-based Image Combining for Parallel Rendering

  • An electronic display often has to present information from several sources. This contribution reports about an approach, in which programmable logic (FPGA) synchronises and combines several graphics inputs. The application area is computer graphics, especially rendering of large 3D models, which is a computing intensive task. Therefore, complex scenes are generated on parallel systems and merged to give the requested output image. So far, the transportation of intermediate results is often done by a local area network. However, as this can be a limiting factor, the new approach removes this bottleneck and combines the graphic signals with an FPGA.

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Metadaten
Document Type:Conference Object
Language:English
Parent Title (English):electronic displays, March 2010, Nürnberg, Germany
URL:http://vc.inf.h-bonn-rhein-sieg.de/basilic/Publications/2010/WHB10/
Publication year:2010
Departments, institutes and facilities:Fachbereich Informatik
Fachbereich Elektrotechnik, Maschinenbau, Technikjournalismus
Institute of Visual Computing (IVC)
Dewey Decimal Classification (DDC):0 Informatik, Informationswissenschaft, allgemeine Werke / 00 Informatik, Wissen, Systeme / 004 Datenverarbeitung; Informatik
Entry in this database:2015/04/02