Fachbereich Ingenieurwissenschaften und Kommunikation
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An electronic display often has to present information from several sources. This contribution reports about an approach, in which programmable logic (FPGA) synchronises and combines several graphics inputs. The application area is computer graphics, especially rendering of large 3D models, which is a computing intensive task. Therefore, complex scenes are generated on parallel systems and merged to give the requested output image. So far, the transportation of intermediate results is often done by a local area network. However, as this can be a limiting factor, the new approach removes this bottleneck and combines the graphic signals with an FPGA.
This paper describes FGPA-based image combining for parallel graphics systems. The goal of our current work is to reduce network traffic and latency for increasing performance in parallel visualization systems. Initial data distribution is based on a common ethernet network whereas image combining and returning differs to traditional parallel rendering methods. Calculated sub-images are grabbed directly from the DVI-Ports for fast image compositing by a FPGA-based combiner.
Qualifikation für gute Lehre
(2010)
Eine von insgesamt sechs Arbeitsgruppen der Jahrestagung des HRK Bologna-Zentrums 2009 beschäftigte sich mit dem Themenbereich "Qualifikation für gute Lehre". Nach zwei Impulsvorträgen diskutierten die Teilnehmer, wie Hochschulangehörige noch stärker als bisher für die Lehre
qualifiziert werden können.